Datasheet

December 1990 4
Philips Semiconductors Product specification
14-stage binary ripple counter with oscillator 74HC/HCT4060
DYNAMIC POWER DISSIPATION FOR 74HC
Note
1. GND = 0 V; T
amb
=25°C
DYNAMIC POWER DISSIPATION FOR 74HCT
Notes
1. GND = 0 V; T
amb
=25°C
2. Where: f
o
= output frequency in MHz
f
osc
= oscillator frequency in MHz
∑ (C
L
× V
CC
2
× f
o
) = sum of outputs
C
L
= output load capacitance in pF
C
t
= timing capacitance in pF
V
CC
= supply voltage in V
APPLICATIONS
• Control counters
• Timers
• Frequency dividers
• Time-delay circuits
PARAMETER V
CC
(V) TYPICAL FORMULA FOR P
D
(µW) (note 1)
total dynamic power
dissipation when using the
on-chip oscillator (P
D
)
2.0
4.5
6.0
C
PD
× f
osc
× V
CC
2
+∑(C
L
× V
CC
2
× f
o
) + 2C
t
× V
CC
2
× f
osc
+ 60 × V
CC
C
PD
× f
osc
× V
CC
2
+∑(C
L
× V
CC
2
× f
o
) + 2C
t
× V
CC
2
× f
osc
+ 1 750 × V
CC
C
PD
× f
osc
× V
CC
2
+∑(C
L
× V
CC
2
× f
o
) + 2C
t
× V
CC
2
× f
osc
+ 3 800 × V
CC
PARAMETER V
CC
(V) TYPICAL FORMULA FOR P
D
(µW) (note 1)
total dynamic power
dissipation when using the
on-chip oscillator (P
D
)
4.5 C
PD
× f
osc
× V
CC
2
+∑(C
L
× V
CC
2
× f
o
) + 2C
t
× V
CC
2
× f
osc
+ 1 750 × V
CC
Fig.4 Functional diagram.