Datasheet

December 1990 7
Philips Semiconductors Product specification
12-stage binary ripple counter 74HC/HCT4040
AC WAVEFORMS
PACKAGE OUTLINES
See
“74HC/HCT/HCU/HCMOS Logic Package Outlines” .
Fig.7 Waveforms showing the clock (CP) to output (Q
n
) propagation delays, the clock pulse width, the output
transition times and the maximum clock pulse frequency.
Also showing the master reset (MR) pulse width, the master reset to output (Q
n
) propagation delays and
the master reset to clock (CP) removal time.
(1) HC : V
M
= 50%; V
I
= GND to V
CC
.
HCT: V
M
= 1.3 V; V
I
= GND to 3 V.