Datasheet

2003 Dec 12 4
Philips Semiconductors Product specification
Quad 2-input OR gate 74HC32; 74HCT32
handbook, halfpage
114
GND
(1)
1A
V
CC
7
2
3
4
5
6
1B
1Y
2A
2B
2Y
13
12
11
10
9
4B
4A
4Y
3B
3A
8
GND
Top view
3Y
MNB060
Fig.2 Pin configuration DHVQFN14.
(1) The die substrate is attached to this pad using conductive die
attach material. It can not be used as a supply pin or input.
handbook, halfpage
MNA242
1A
1B
1Y
2
1
3
2A
2B
2Y
5
4
6
3A
3B
3Y
10
9
8
4A
4B
4Y
13
12
11
Fig.3 Logic symbol.
handbook, halfpage
MNA243
3
≥ 1
≥ 1
≥ 1
≥ 1
2
1
6
5
4
8
10
9
11
13
12
Fig.4 Logic symbol (IEEE/IEC).
handbook, halfpage
MNA241
A
B
Y
Fig.5 Logic diagram (one gate).