INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications • The IC06 74HC/HCT/HCU/HCMOS Logic Package Information • The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT273 Octal D-type flip-flop with reset; positive-edge trigger Product specification File under Integrated Circuits, IC06 September 1993
Philips Semiconductors Product specification Octal D-type flip-flop with reset; positive-edge trigger 74HC/HCT273 FEATURES GENERAL DESCRIPTION • Ideal buffer for MOS microprocessor or memory The 74HC/HCT273 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A.
Philips Semiconductors Product specification Octal D-type flip-flop with reset; positive-edge trigger 74HC/HCT273 PIN DESCRIPTION PIN NO. SYMBOL NAME AND FUNCTION 1 MR master reset input (active LOW) 2, 5, 6, 9, 12, 15, 16, 19 Q0 to Q7 flip-flop outputs 3, 4, 7, 8, 13, 14, 17, 18 D0 to D7 data inputs 10 GND ground (0 V) 11 CP clock input (LOW-to-HIGH, edge-triggered) 20 VCC positive supply voltage Fig.1 Pin configuration. September 1993 Fig.2 Logic symbol. 3 Fig.
Philips Semiconductors Product specification Octal D-type flip-flop with reset; positive-edge trigger 74HC/HCT273 FUNCTION TABLE INPUTS OUTPUTS OPERATING MODES MR CP Dn Qn reset (clear) L X X L load “1” H ↑ h H load “0” H ↑ I L Note 1. H = HIGH voltage level h = HIGH voltage level one set-up time prior to the LOW-to-HIGH CP transition L = LOW voltage level I = LOW voltage level one set-up time prior to the LOW-to-HIGH CP transition ↑ = LOW-to-HIGH transition X = don’t care Fig.
Philips Semiconductors Product specification Octal D-type flip-flop with reset; positive-edge trigger 74HC/HCT273 DC CHARACTERISTICS FOR 74HC For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”. Output capability: standard ICC category: MSI AC CHARACTERISTICS FOR 74HC GND = 0 V; tr = tf = 6 ns; CL = 50 pF Tamb (°C) TEST CONDITIONS 74HC SYMBOL PARAMETER +25 min. −40 to +85 typ. max. min. max. −40 to +125 min. UNIT V WAVEFORMS CC (V) max.
Philips Semiconductors Product specification Octal D-type flip-flop with reset; positive-edge trigger 74HC/HCT273 DC CHARACTERISTICS FOR 74HCT For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”. Output capability: standard ICC category: MSI Note to HCT types The value of additional quiescent supply current (∆ICC) for a unit load of 1 is given in the family specifications. To determine ∆ICC per input, multiply this value by the unit load coefficient shown in the table below.
Philips Semiconductors Product specification Octal D-type flip-flop with reset; positive-edge trigger 74HC/HCT273 AC WAVEFORMS (1) HC : VM = 50%; VI = GND to VCC. HCT: VM = 1.3 V; VI = GND to 3 V. Fig.6 Waveforms showing the clock (CP) to output (Qn) propagation delays, the clock pulse width output transition times and the maximum clock pulse frequency. (1) HC : VM = 50%; VI = GND to VCC. HCT: VM = 1.3 V; VI = GND to 3 V. Fig.
Philips Semiconductors Product specification Octal D-type flip-flop with reset; positive-edge trigger 74HC/HCT273 PACKAGE OUTLINES See “74HC/HCT/HCU/HCMOS Logic Package Outlines”.
