Datasheet

ManualsBrandsNXP ManualsEmbedded Processors & ControllersSingle NAND Gate 74HC TSSOP 25ns

1. General description

The 74HC1G00; 74HCT1G00 is a single 2-input NAND gate. Inputs include clamp diodes

that enable the use of current limiting resistors to interface inputs to voltages in excess of

2. Features and benefits

 Wide supply voltage range from 2.0 V to 6.0 V

 Input levels:

 For 74HC1G00: CMOS level

 For 74HCT1G00: TTL level

 Symmetrical output impedance

 High noise immunity

 Low power dissipation

 Balanced propagation delays

 ESD protection:

 HBM JESD22-A114E exceeds 2000 V

 MM JESD22-A115-A exceeds 200 V

 Multiple package options

 Specified from 40 C to +85 C and 40 C to +125 C

3. Ordering information

74HC1G00; 74HCT1G00

2-input NAND gate

Rev. 5 — 25 September 2013 Product data sheet

Table 1. Ordering information

Type number Package

Temperature range Name Description Version

74HC1G00GW 40 C to +125 C TSSOP5 plastic thin shrink small outline package; 5 leads;

body width 1.25 mm

SOT353-1

74HCT1G00GW

74HC1G00GV 40 C to +125 C SC-74A plastic surface-mounted package; 5 leads SOT753

74HCT1G00GV

Summary of content (12 pages)

PAGE 1
74HC1G00; 74HCT1G00 2-input NAND gate Rev. 5 — 25 September 2013 Product data sheet 1. General description The 74HC1G00; 74HCT1G00 is a single 2-input NAND gate. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits  Wide supply voltage range from 2.0 V to 6.
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74HC1G00; 74HCT1G00 NXP Semiconductors 2-input NAND gate 4. Marking Table 2. Marking codes Type number Marking[1] 74HC1G00GW HA 74HCT1G00GW TA 74HC1G00GV H00 74HCT1G00GV T00 [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram B 1 B 2 A 1 Y & 4 Y 2 Logic symbol A mna098 mna097 Fig 1. 4 Fig 2. IEC logic symbol Fig 3. mna099 Logic diagram 6. Pinning information 6.
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74HC1G00; 74HCT1G00 NXP Semiconductors 2-input NAND gate 7. Functional description Table 4. Function table H = HIGH voltage level; L = LOW voltage level Input Output A B Y L L H L H H H L H H H L 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). [1] Symbol Parameter VCC supply voltage IIK input clamping current IOK Conditions Min Max Unit 0.5 +7.0 V VI < 0.
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74HC1G00; 74HCT1G00 NXP Semiconductors 2-input NAND gate 10. Static characteristics Table 7. Static characteristics Voltages are referenced to GND (ground = 0 V). All typical values are measured at Tamb = 25 C. Symbol Parameter 40 C to +85 C Conditions Min Typ 40 C to +125 C Max Min Unit Max For type 74HC1G00 VIH VIL VOH VOL HIGH-level input voltage LOW-level input voltage HIGH-level output voltage LOW-level output voltage VCC = 2.0 V 1.5 1.2 - 1.5 - V VCC = 4.5 V 3.
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74HC1G00; 74HCT1G00 NXP Semiconductors 2-input NAND gate Table 7. Static characteristics …continued Voltages are referenced to GND (ground = 0 V). All typical values are measured at Tamb = 25 C. Symbol Parameter 40 C to +85 C Conditions Min Typ 40 C to +125 C Max Min Unit Max ICC supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 10 - 20 A ICC additional supply current per input; VCC = 4.5 V to 5.5 V; VI = VCC  2.
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74HC1G00; 74HCT1G00 NXP Semiconductors 2-input NAND gate 12. Waveforms A, B input VM VCC tPHL Y output tPLH PULSE GENERATOR VM VI VO DUT CL RT mna100 mna101 For HC1G: VM = 0.5  VCC; VI = GND to VCC Test data is given in Table 8. For HCT1G: VM = 1.3 V; VI = GND to 3.0 V CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to output impedance Zo of the pulse generator. Fig 5.
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4HC1G00; 74HCT1G00 NXP Semiconductors 2-input NAND gate 13. Package outline TSSOP5: plastic thin shrink small outline package; 5 leads; body width 1.25 mm E D SOT353-1 A X c y HE v M A Z 5 4 A2 A (A3) A1 θ 1 Lp 3 L e w M bp detail X e1 0 1.5 3 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D(1) E(1) e e1 HE L Lp v w y Z(1) θ mm 1.1 0.1 0 1.0 0.8 0.15 0.30 0.15 0.25 0.08 2.25 1.85 1.35 1.15 0.65 1.3 2.25 2.0 0.
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74HC1G00; 74HCT1G00 NXP Semiconductors 2-input NAND gate Plastic surface-mounted package; 5 leads SOT753 D E B y A X HE 5 v M A 4 Q A A1 c 1 2 3 Lp detail X bp e w M B 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 bp c D E e HE Lp Q v w y mm 1.1 0.9 0.100 0.013 0.40 0.25 0.26 0.10 3.1 2.7 1.7 1.3 0.95 3.0 2.5 0.6 0.2 0.33 0.23 0.2 0.2 0.1 OUTLINE VERSION REFERENCES IEC JEDEC SOT753 Fig 8.
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74HC1G00; 74HCT1G00 NXP Semiconductors 2-input NAND gate 14. Abbreviations Table 9. Abbreviations Acronym Description CMOS Complementary Metal Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic 15. Revision history Table 10. Revision history Document ID Release date Data sheet status Change notice Supersedes 74HC_HCT1G00 v.5 20130925 Product data sheet - 74HC_HCT1G00 v.4 - 74HC_HCT1G00 v.
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74HC1G00; 74HCT1G00 NXP Semiconductors 2-input NAND gate 16. Legal information 16.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification.
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74HC1G00; 74HCT1G00 NXP Semiconductors 2-input NAND gate Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use.
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NXP Semiconductors 74HC1G00; 74HCT1G00 2-input NAND gate 18. Contents 1 2 3 4 5 6 6.1 6.2 7 8 9 10 11 12 13 14 14.1 15 16 16.1 16.2 16.3 16.4 17 18 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . .