Datasheet

December 1990 9
Philips Semiconductors Product specification
Presettable synchronous 4-bit binary
up/down counter
74HC/HCT191
t
rem
removal time
PL to CP
35
7
6
8
3
2
45
9
8
55
11
9
ns 2.0
4.5
6.0
Fig.15
t
su
set-up time
U/D to CP
205
41
35
50
18
14
255
51
43
310
62
53
ns 2.0
4.5
6.0
Fig.17
t
su
set-up time
D
n
to PL
100
20
17
19
7
6
125
25
21
150
30
26
ns 2.0
4.5
6.0
Fig.16
t
su
set-up time
CE to CP
140
28
24
44
16
13
175
35
30
210
42
36
ns 2.0
4.5
6.0
Fig.17
t
h
hold time
U/D to CP
0
0
0
−39
−14
−11
0
0
0
0
0
0
ns 2.0
4.5
6.0
Fig.17
t
h
hold time
D
n
to PL
0
0
0
−11
−4
−3
0
0
0
0
0
0
ns 2.0
4.5
6.0
Fig.16
t
h
hold time
CE to CP
0
0
0
−28
−10
−8
0
0
0
0
0
0
ns 2.0
4.5
6.0
Fig.17
f
max
maximum clock pulse
frequency
4.0
20
24
11
33
39
3.2
16
19
2.6
13
15
MHz 2.0
4.5
6.0
Fig.10
SYMBOL PARAMETER
T
amb
(°C)
UNIT
TEST CONDITIONS
74HC
V
CC
(V)
WAVEFORMS
+25 −40 to +85 −40 to +125
min. typ. max. min. max. min. max.