Datasheet

1997 Nov 25 7
Philips Semiconductors Product specification
Dual JK flip-flop with set and reset;
positive-edge trigger
74HC/HCT109
AC WAVEFORMS
Fig.6 Waveforms showing the clock (nCP) to output (nQ, nQ) propagation delays, the clock pulse width, the nJ,
nK to nCP set-up, the nCP to nJ, nK hold times, the output transition times and the maximum clock pulse
frequency.
The shaded areas indicate when the
input is permitted to change for
predictable output performance.
handbook, full pagewidth
MBK216
V
M
(1)
nCP INPUT
nS
D
INPUT
nR
D
INPUT
nQ OUTPUT
nQ OUTPUT
V
M
(1)
V
M
(1)
V
M
(1)
V
M
(1)
t
W
t
rem
t
rem
t
W
t
PHL
t
PLH
t
PLH
t
PHL
Fig.7 Waveforms showing the set (nS
D
) and reset (nR
D
) input to output (nQ, nQ) propagation delays, the set
and reset pulse widths and the nR
D
, nS
D
to nCP removal time.
(1) HC: V
M
= 50%; V
I
= GND to V
CC
.
HCT: V
M
= 1.3 V; V
I
= GND to 3 V.