Datasheet

1997 Nov 25 6
Philips Semiconductors Product specification
Dual JK flip-flop with set and reset;
positive-edge trigger
74HC/HCT109
DC CHARACTERISTICS FOR 74HCT
For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications” .
Output capability: standard
I
CC
category: flip-flops
AC CHARACTERISTICS FOR 74HCT
GND = 0 V; t
r
= t
f
= 6 ns; C
L
= 50 pF
SYMBOL PARAMETER
T
amb
(°C)
UNIT
TEST CONDITIONS
74HCT
V
CC
(V)
WAVEFORMS+25 −40 to +85 −40 to +125
min. typ. max. min. max. min. max.
t
PHL
/ t
PLH
propagation delay
nCP to nQ, nQ
20 35 44 53 ns 4.5 Fig.6
t
PLH
propagation delay
nS
D
to nQ
13 26 33 39 ns 4.5 Fig.7
t
PHL
propagation delay
nS
D
to nQ
19 35 44 53 ns 4.5 Fig.7
t
PHL
propagation delay
nR
D
to nQ
19 35 44 53 ns 4.5 Fig.7
t
PLH
propagation delay
nR
D
to nQ
16 32 40 48 ns 4.5 Fig.7
t
THL
/ t
TLH
output transition time 7 15 19 22 ns 4.5 Fig.6
t
W
clock pulse width
HIGH or LOW
18 9 23 27 ns 4.5 Fig.6
t
W
set or reset pulse width
HIGH or LOW
16 8 20 24 ns 4.5 Fig.7
t
rem
removal time
nS
D
, nR
D
to nCP
16 8 20 24 ns 4.5 Fig.7
t
su
set-up time
nJ, nK to nCP
18 8 23 27 ns 4.5 Fig.6
t
h
hold time
nJ, n
K to nCP
3 −3 3 3 ns 4.5 Fig.6
f
max
maximum clock
pulse frequency
27 55 22 18 MHz 4.5 Fig.6