Datasheet

1997 Nov 25 3
Philips Semiconductors Product specification
Dual JK flip-flop with set and reset;
positive-edge trigger
74HC/HCT109
PIN DESCRIPTION
PIN NO. SYMBOL NAME AND FUNCTION
1, 15 1
R
D
, 2R
D
asynchronous reset-direct input (active LOW)
2, 14, 3, 13 1J, 2J, 1
K, 2K synchronous inputs; flip-flops 1 and 2
4, 12 1CP, 2CP clock input (LOW-to-HIGH, edge-triggered)
5, 11 1
S
D
, 2S
D
asynchronous set-direct input (active LOW)
6, 10 1Q, 2Q true flip-flop outputs
7, 9 1
Q, 2Q complement flip-flop outputs
8 GND ground (0 V)
16 V
CC
positive supply voltage
Fig.1 Pin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol.