Datasheet

MC68HC908GP20 — Rev 2.1 Advance Information
Freescale Semiconductor 181
11.9 FLASH Block Protect Register
The block protect register (FLBPR) is implemented as a byte within the
FLASH memory. Each bit, when programmed, protects a range of
addresses in the FLASH.
BPR3 — Block Protect Register Bit 3
This bit protects the memory contents in the address range $C000 to
$FFFF.
1 = Address range protected from erase or program
0 = Address range open to erase or program
BPR2 — Block Protect Register Bit 2
In a larger memory, this bit would protect the memory contents in the
address range $A000 to $FFFF. It is redundant in this implementation.
Setting this bit locks everything from $B000 to $FFFF.
1 = Address range protected from erase or program
0 = Address range open to erase or program
BPR1 — Block Protect Register Bit 1
In a larger memory, this bit would protect the memory contents in the
address range $9000 to $FFFF. It is redundant in this implementation.
Setting this bit locks everything from $B000 to $FFFF.
1 = Address range protected from erase or program
0 = Address range open to erase or program
Address: $FF80
Bit 7654321Bit 0
Read:
Bit 7 Bit 6 Bit 5 Bit 4 BPR3 BPR2 BPR1 BPR0
Write:
Reset:UUUUUUUU
U = Unaffected by reset. Initial value from factory is 0.
Figure 11-3. FLASH Block Protect Register (FLBPR)