Datasheet

Analog Integrated Circuit Device Data
Freescale Semiconductor 7
07XSC200
3.2 Static Electrical Characteristics
Table 3. Static Electrical Characteristics
Characteristics noted under conditions 6.0 V V
PWR
 20 V, 3.0 V  V
DD
 5.5 V, - 40 C  T
A
 125 C, GND = 0 V, unless
otherwise noted. Typical values noted reflect the approximate parameter means at T
A
= 25 °C under nominal conditions, unless
otherwise noted.
Characteristic Symbol Min Typ Max Unit
POWER INPUTS
Battery Supply Voltage Range
• Fully Operational
• Extended mode
(8)
V
PWR
6.0
4.0
–
–
20
28
V
Battery Clamp Voltage
(9)
V
PWR(CLAMP)
41 47 53 V
V
PWR
Operating Supply Current
• Outputs commanded ON, HS[0 : 1] open, IN[0:1] > V
IH
I
PWR(ON)
–6.520
mA
V
PWR
Supply Current
• Outputs commanded OFF, OFF Open-load Detection Disabled, HS[0 : 1]
shorted to the ground with V
DD
= 5.5 V
WAKE > V
IH
or RSTB > V
IH
and IN[0:1] < V
IL
I
PWR(SBY)
–6.57.5
mA
Sleep State Supply Current
V
PWR
= 12 V, RSTB = WAKE = CLOCK = IN[0:1] < V
IL
, HS[0 :1] shorted to
ground
•T
A
= 25 °C
•T
A
= 85 °C
I
PWR(SLEEP)
–
–
1.0
–
5.0
30
A
V
DD
Supply Voltage
V
DD(ON)
3.0–5.5V
V
DD
Supply Current at V
DD
= 5.5 V
• No SPI Communication
•8.0 MHz SPI Communication
(10)
I
DD(ON)
–
–
1.6
5.0
2.2
–
mA
V
DD
Sleep State Current at V
DD
= 5.5 V
I
DD(SLEEP)
––5.0A
Overvoltage Shutdown Threshold
V
PWR(OV)
28 32 36 V
Overvoltage Shutdown Hysteresis
V
PWR(OVHYS)
0.2 0.8 1.5 V
Undervoltage Shutdown Threshold
(11)
V
PWR(UV)
3.3 3.9 4.3 V
V
PWR
and V
DD
Power on Reset Threshold
V
SUPPLY(POR)
0.5–0.9V
PWR(UV)
Recovery Undervoltage Threshold
V
PWR(UV)_UP
3.4 4.1 4.5 V
V
DD
Supply Failure Threshold (for V
PWR
> V
PWR(UV)
)
V
DD(FAIL)
2.2 2.5 2.8 V
Notes
8. In extended mode, the functionality is guaranteed but not the electrical parameters. From 4.0 to 6.0 V voltage range, the device is only
protected with the thermal shutdown detection.
9. Measured with the outputs open.
10. Typical value guaranteed per design.
11. Output will automatically recover with time limited auto-retry to instructed state when V
PWR
voltage is restored to normal as long as the
V
PWR
degradation level did not go below the undervoltage power-ON reset threshold. This applies to all internal device logic that is
supplied by V
PWR
and assumes that the external V
DD
supply is within specification.