Datasheet

Analog Integrated Circuit Device Data
Freescale Semiconductor 11
07XSC200
CONTROL INTERFACE
Input Logic High Voltage
(19)
V
IH
2.0 V
DD
+0.3 V
Input Logic Low Voltage
(19)
V
IL
-0.3 0.8 V
Input Logic Pull-down Current (SCLK, SI)
(22)
I
DWN
5.0 20 A
Input Logic Pull-up Current (CSB)
(23)
I
UP
5.0 20 A
SO, FSB Tri-state Capacitance
(20)
C
SO
20 pF
Input Logic Pull-down Resistor (RSTB, WAKE, CLOCk and IN[0:1])
R
DWN
125 250 500 k
Input Capacitance
(20)
CIN
4.0 12 pF
Wake Input Clamp Voltage
(21)
•I
CL(WAKE)
< 2.5 mA
V
CL(WAKE)
18 25 32
V
Wake Input Forward Voltage
•I
CL(WAKE)
= -2.5 mA
V
F(WAKE)
- 2.0 - 0.3
V
SO High-state Output Voltage
•I
OH
= 1.0 mA
V
SOH
V
DD
-0.4
V
SO and FSB Low-state Output Voltage
•I
OL
= -1.0 mA
V
SOL
0.4
V
SO, CSNS and FSB Tri-state Leakage Current
CSB = V
IH
and 0 V < V
SO
< V
DD
, or FSB = 5.5 V, or CSNS = 0.0 V
I
SO(LEAK)
- 2.0 0.0 2.0
A
FSI External Pull-down Resistance
(24)
Watchdog Disabled
Watchdog Enabled
RFS
10
0.0
Infinite
1.0
k
Notes
19. Upper and lower logic threshold voltage range applies to SI, CSB, SCLK, FSB, IN[0:1], CLOCK and WAKE input signals. The WAKE and
RSTB signals may be supplied by a derived voltage referenced to V
PWR
.
20. Input capacitance of SI, CSB, SCLK, RSTB, IN[0:1], CLOCK and WAKE. This parameter is guaranteed by process monitoring but is not
production tested.
21. The current must be limited by a series resistance when using voltages > 7.0 V.
22. Pull-down current is with V
SI
> 1.0 V and V
SCLK
> 1.0 V.
23. Pull-up current is with V
CSB
< 2.0 V. CSB has an active internal pull-up to V
DD
.
24. In Fail-safe HS[0:1] depends respectively on IN[0:1]. FSI has an active internal pull-up to V
REG
~ 3.0 V.
Table 3. Static Electrical Characteristics (continued)
Characteristics noted under conditions 6.0 V V
PWR
20 V, 3.0 V V
DD
5.5 V, - 40 C T
A
125 C, GND = 0 V, unless
otherwise noted. Typical values noted reflect the approximate parameter means at T
A
= 25 °C under nominal conditions, unless
otherwise noted.
Characteristic Symbol Min Typ Max Unit