Datasheet
TJA1085 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 1 — 23 October 2012 41 of 61
NXP Semiconductors
TJA1085
FlexRay active star coupler
10. Dynamic characteristics
Table 15. Dynamic characteristics
All parameters are guaranteed for V
BAT
= 4.45 V to 60 V; V
CC
= 4.45 V to 5.25 V; V
BUF
= 4.45 V to 5.25 V; V
IO
= 2.55 V to
5.25 V; T
vj
=
40
C to + 150
C; R
bus
= 40
, C
bus
= 100 pF; C
RXD
= 15 pF; C
TRXD0
= C
TRXD1
= 50 pF and C
SDO
= 50 pF
unless otherwise specified. All voltages are defined with respect to ground; positive currents flow into the IC.
Symbol Parameter Conditions Min Typ Max Unit
Undervoltage detection
t
det(uv)(VBAT)
undervoltage detection time on
pin V
BAT
V
BAT
=4.35V 5 - 150 s
t
rec(uv)(VBAT)
undervoltage recovery time on
pin V
BAT
V
BAT
=4.85V 5 - 150 s
t
det(uv)(VCC)
undervoltage detection time on
pin V
CC
V
CC
= 4.35 V 5 - 100 s
t
rec(uv)(VCC)
undervoltage recovery time on
pin V
CC
V
CC
=4.85V 5 - 100 s
t
det(uv)(VBUF)
undervoltage detection time on
pin V
BUF
V
BUF
=4.10V 5 - 100 s
t
rec(uv)(VBUF)
undervoltage recovery time on
pin V
BUF
V
BUF
=4.6V 5 - 100 s
t
det(uv)(VIO)
undervoltage detection time on
pin V
IO
V
IO
=2.45V 5 - 100 s
t
rec(uv)(VIO)
undervoltage recovery time on
pin V
IO
V
IO
=2.9V 5 - 100 s
t
to(uvd)(VCC)
undervoltage detection time-out
time on pin V
CC
100 - 670 ms
t
to(uvd)(VIO)
undervoltage detection time-out
time on pin V
IO
100 - 670 ms
t
to(uvr)(VCC)
undervoltage recovery time-out
time on pin V
CC
1-5ms
t
to(uvr)(VIO)
undervoltage recovery time-out
time on pin V
IO
1-5ms
SPI
t
cy(clk)
clock cycle time 0.5 - 100 s
t
SPILEAD
SPI enable lead time 250 - - ns
t
SPILAG
SPI enable lag time 250 - - ns
t
su(D)
data input set-up time 150 - - ns
t
h(D)
data input hold time 100 - - ns
t
d(SCLK-SDO)
delay time from SCLK to SDO - - 200 ns
t
WH(S)
chip select pulse width HIGH 10 - - s
t
d(SCSNHL-SDOL)
SCSN falling edge to SDO
LOW-level delay time
--250ns
t
d(SCSNLH-SDOZ)
SCSN rising edge to SDO
three-state delay time
--500ns