Datasheet

TJA1085 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 1 — 23 October 2012 29 of 61
NXP Semiconductors
TJA1085
FlexRay active star coupler
WU_LOCAL:
WU_LOCAL is set when a local wake-up event is detected. A WU interrupt is generated.
WU_LOCAL is reset after the General Status register has been read successfully or when
the TJA1085 switches from AS_Normal to AS_Standby or AS_Sleep. This ensures that a
new wake-up event will be detected.
WU_TRXD:
WU_TRXD is set when a wake-up event is detected on the TRXD0/1 interface. A WU
interrupt is generated.
WU_TRXD is reset after the General Status register has been read successfully or when
the TJA1085 switches from AS_Normal to AS_Standby or AS_Sleep. This ensures that a
new wake-up event will be detected.
BGE_FB:
Bit BGE_FB provides information about the voltage level on pin BGE.
BGE_FB is set when the voltage on BGE is HIGH and reset when the voltage on BGE is
LOW.
UV_VBAT:
UV_VBAT is set when a V
BAT
undervoltage is detected, generating a UV_ERROR
interrupt.
If bit latching is enabled (BIT_LATCHING = 1), UV_BAT will remain set until the General
Status register has been read, after which it will reflect the current ‘live’ situation (set if
V
BAT
<V
uvd(VBAT)
for longer than t
det(uv)(VBAT)
and reset if V
BAT
>V
uvr(VBAT)
for longer than
t
rec(uv)(VBAT)
). If bit latching is not enabled, UV_BAT will reflect the ‘live’ situation at all
times.
UV_VCC:
UV_VCC is set when a V
CC
undervoltage is detected, generating a UV_ERROR interrupt.
If bit latching is enabled (BIT_LATCHING = 1), UV_VCC will remain set until the General
Status register has been read, after which it will reflect the current ‘live’ situation (set if
V
CC
<V
uvd(VCC)
for longer than t
to(uvd)(VCC)
and reset if V
CC
>V
uvr(VCC)
for longer than
t
to(uvr)(VCC)
). If bit latching is not enabled, UV_VCC will reflect the ‘live’ situation at all
times.
UV_VIO:
UV_VIO is set when a V
IO
undervoltage is detected, generating a UV_ERROR interrupt.
If bit latching is enabled (BIT_LATCHING = 1), UV_VIO will remain set until the General
Status register has been read, after which it will reflect the current ‘live’ situation (set if
V
IO
<V
uvd(VIO)
for longer than t
to(uvd)(VIO)
and reset if V
IO
>V
uvr(VIO)
for longer than
t
to(uvr)(VIO)
). If bit latching is not enabled, UV_VIO will reflect the ‘live’ situation at all times.
When a V
IO
undervoltage is active, the digital inputs are disabled and the TJA1085 is
unable to accept Host commands. If the V
IO
undervoltage persists for longer than
t
to(uvd)(VIO)
, the APM flag is set and the TJA1085 switches from Host control to
Autonomous control.