Datasheet

TJA1085 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 1 — 23 October 2012 11 of 61
NXP Semiconductors
TJA1085
FlexRay active star coupler
[1] Internal pull-up resistor (R
pu
) to V
BUF
.
[1] Activity detected on TRXD0/TRXD1.
6.6 Bus error detection
The TJA1085 provides bus error detection on each branch during data transmission.
When a transmit error (TxE_BRx = 1) is detected on a branch, an EVENT_BRx interrupt is
generated to notify the host.
The following conditions trigger bus error detection:
• Short circuit BP to BM
• Short-circuit BP to GND
• Short-circuit BM to GND
• Short-circuit BP to V
CC
or V
BAT
• Short-circuit BM to V
CC
or V
BAT
6.7 Interrupt generation
Interrupts are generated when specific events take place or associated status bits in the
General or Branch X status registers are set. When an interrupt is generated, the relevant
interrupt status bit is set in the Interrupt Status register (see Table 9
) and pin INTN is
forced LOW.
Some interrupt status bits (PWON, WU, SPI_ERROR and HC_ERROR) are reset
immediately after the Interrupt Status register has been read successfully (i.e. a rising
edge on SCSN with no SPI_ERROR).
DATA_0 yes LOW LOW high ohmic
[1]
AS_Normal
DATA_1 yes LOW high ohmic
[1]
LOW AS_Normal
idle yes LOW high ohmic
[1]
high ohmic
[1]
AS_Normal
X yes LOW high ohmic
[1]
high ohmic
[1]
AS_Standby, AS_Sleep
X X HIGH high ohmic
[1]
high ohmic
[1]
AS_PowerOff, AS_Reset
Table 5. TRXD0/1 interface configured as input
TRXD0 TRXD1 V
IO
UV
detected
RXD Bus Operating mode
X falling edge no HIGH DATA_1 AS_Normal
[1]
HIGH HIGH no HIGH idle AS_Normal
falling edge X X LOW DATA_0 AS_Normal
[1]
X falling edge yes LOW DATA_1 AS_Normal
[1]
HIGH HIGH yes LOW idle AS_Normal
LOW LOW X LOW DATA_0 collision detected on TRXD0/1
Table 4. Bus as input
Bus V
IO
UV
detected
RXD TRXD0 TRXD1 Operating mode