Datasheet

TDA8034T_TDA8034AT All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 3.1 — 13 December 2012 18 of 30
NXP Semiconductors
TDA8034T; TDA8034AT
Smart card interface
V
OH
HIGH-level output
voltage
I
OH
= 200 A0.9V
CC
-V
CC
V
current limit I
OH
= 20 mA 0 - 0.4 V
t
r
rise time C
L
= 100 pF - - 0.1 s
t
f
fall time C
L
= 100 pF - - 0.1 s
Clock output to the card: pin CLK
V
o
output voltage Shutdown mode
no load 0 - 0.1 V
I
o
=1mA 0 - 0.3 V
I
o
output current Shutdown mode; pin CLK
grounded
-- 1mA
V
OL
LOW-level output
voltage
I
OL
= 200 A0-0.3V
current limit I
OL
=70mA V
CC
 0.4 - V
CC
V
V
OH
HIGH-level output
voltage
I
OH
= 200 A0.9V
CC
-V
CC
V
current limit I
OH
= 70 mA 0 - 0.4 V
t
r
rise time C
L
=30pF
[5]
- - 16 ns
t
f
fall time C
L
=30pF
[5]
- - 16 ns
f
CLK
frequency on pin CLK operational 0 - 20 MHz
 duty cycle C
L
=30pF
[5]
45 - 55 %
SR slew rate rise and fall; C
L
=30pF
V
CC
=+5V 0.2 - - V/ns
V
CC
= +3 V 0.12 - - V/ns
Control inputs: pins CLKDIV1 and RSTIN
[6]
V
IL
LOW-level input
voltage
0.3 - 0.3V
DD(INTF)
V
V
IH
HIGH-level input
voltage
0.7 V
DD(INTF)
-V
DD(INTF)
+0.3 V
V
hys
hysteresis voltage control input - 0.14 V
DD(INTF)
-V
I
IL
LOW-level input current V
IL
=0V - - 1 A
I
IH
HIGH-level input
current
V
IH
=V
DD(INTF)
-- 1 A
Control input: pin CMDVCCN
[6]
V
IL
LOW-level input
voltage
0.3 - 0.3V
DD(INTF)
V
V
IH
HIGH-level input
voltage
0.7V
DD(INTF)
-V
DD(INTF)
+0.3 V
V
hys
hysteresis voltage control input - 0.14V
DD(INTF)
-V
I
IL
LOW-level input current V
IL
=0V - - 1 A
I
IH
HIGH-level input
current
V
IH
=V
DD(INTF)
-- 1 A
f
CMDVCCN
frequency on pin
CMDVCCN
-- 100Hz
Table 7. Characteristics of IC supply voltage
…continued
V
DDP
= 5 V; V
DD
= 3.3 V; V
DD(INTF)
= 3.3 V; f
xtal
= 10 MHz; GND = 0 V; T
amb
= 25  C; unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit