Datasheet

TDA8034HN All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 3.2 — 25 March 2014 29 of 30
NXP Semiconductors
TDA8034HN
Low power smart card interface
20. Figures
Fig 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
Fig 2. Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . .4
Fig 3. Voltage supervisor circuit. . . . . . . . . . . . . . . . . . . .6
Fig 4. Voltage supervisor waveforms. . . . . . . . . . . . . . . .6
Fig 5. Basic layout for using an external clock. . . . . . . . .7
Fig 6. Shutdown and Deep shutdown mode
activation/deactivation . . . . . . . . . . . . . . . . . . . . . .9
Fig 7. Activation sequence at t3. . . . . . . . . . . . . . . . . . .10
Fig 8. Deactivation sequence . . . . . . . . . . . . . . . . . . . .11
Fig 9. Emergency deactivation sequence after card
removal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
Fig 10. Operation of debounce feature with pins OFFN,
CMDVCCN, PRESN and V
CC
. . . . . . . . . . . . . . .13
Fig 11. Definition of output and input transition times . . .19
Fig 12. Application diagram . . . . . . . . . . . . . . . . . . . . . . .20
Fig 13. Package outline SOT616-1 (HVQFN24) . . . . . . .21
Fig 14. Temperature profiles for large and small
components . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24