Datasheet

TDA8034HN All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 3.2 — 25 March 2014 18 of 30
NXP Semiconductors
TDA8034HN
Low power smart card interface
f
CLK
frequency on pin CLK operational 0 - 20 MHz
 duty cycle C
L
=30pF
[5]
45 - 55 %
SR slew rate rise and fall; C
L
=30pF
V
CC
=5V 0.2 - - V/ns
V
CC
= 3 V or 1.8 V 0.12 - - V/ns
Control inputs: pins CLKDIV1, CLKDIV2, RSTIN, VCC_SEL1 and VCC_SEL2
[6]
V
IL
LOW-level input
voltage
0.3 - 0.3V
DD(INTF)
V
V
IH
HIGH-level input
voltage
0.7 V
DD(INTF)
-V
DD(INTF)
+0.3 V
V
hys
hysteresis voltage control input - 0.14V
DD(INTF)
-V
I
IL
LOW-level input current V
IL
=0V - - 1 A
I
IH
HIGH-level input
current
V
IH
=V
DD(INTF)
-- 1 A
Control input: pin CMDVCCN
[6]
V
IL
LOW-level input
voltage
0.3 - 0.3V
DD(INTF)
V
V
IH
HIGH-level input
voltage
0.7V
DD(INTF)
-V
DD(INTF)
+0.3 V
V
hys
hysteresis voltage control input - 0.14V
DD(INTF)
-V
I
IL
LOW-level input current V
IL
=0V - - 1 A
I
IH
HIGH-level input
current
V
IH
=V
DD(INTF)
-- 1 A
f
CMDVCCN
frequency on pin
CMDVCCN
-- 100Hz
t
w
pulse width 5 V card 30 - - ms
3V card - - 15 ms
Card detection input: pin PRESN
[6][7]
V
IL
LOW-level input
voltage
0.3 - 0.3V
DD(INTF)
V
V
IH
HIGH-level input
voltage
0.7V
DD(INTF)
-V
DD(INTF)
+ 0.3 V
V
hys
hysteresis voltage pin PRESN - 0.14V
DD(INTF)
-V
I
IL
LOW-level input current 0 V < V
IL
<V
DD(INTF)
-- 5 A
I
IH
HIGH-level input
current
0V<V
IH
<V
DD(INTF)
-- 5 A
OFFN output
[8]
V
OL
LOW-level output
voltage
I
OL
=2mA 0 - 0.3 V
V
OH
HIGH-level output
voltage
I
OH
= 15 A0.75V
DD(INTF)
-- V
R
pu
pull-up resistance connected to V
DD(INTF)
16 20 24 k
Table 7. Characteristics of IC supply voltage …continued
V
DDP
= 5 V; V
DD
= 3.3 V; V
DD(INTF)
= 3.3 V; f
xtal
= 10 MHz; GND = 0 V; T
amb
= 25  C; unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit