Datasheet

TDA8034HN All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 3.2 — 25 March 2014 10 of 30
NXP Semiconductors
TDA8034HN
Low power smart card interface
8.8 Deactivation sequence
When a session ends, the microcontroller sets pin CMDVCCN HIGH. The TDA8034HN
then executes an automatic deactivation sequence by counting the sequencer back to the
inactive state (see Figure 8
) as follows:
1. Pin RST is pulled LOW (t11).
2. The clock is stopped, pin CLK is LOW (t12).
3. Pins I/OUC, AUX1UC and AUX2UC are pulled LOW (t13).
4. V
CC
falls to 0 V (t14). The deactivation sequence is completed when V
CC
reaches its
inactive state.
5. V
CC
< 0.4 V (t
deac
)
6. All card contacts become low-impedance to GND. However, pins I/OUC, AUX1UC
and AUX2UC remain pulled up to V
DD
using the 11 k resistor.
7. The internal oscillator returns to its low frequency mode.
Calculation of the time delays is as follows:
• t11 = t10 + 3T / 64
• t12 = t11 + T / 2
• t13 = t11 + T
• t14 = t11 + 3T / 2
• t
deac
= t11 + 3T / 2 + V
CC
fall time
OSCINT = internal oscillator.
Fig 7. Activation sequence at t3
001aal140
CMDVCCN
XTAL1
V
CC
I/O ATR
CLK
> 200 ns
RSTIN
RST
I/OUC
OSCINT
t0 t
d(end)
= t
act
t1 = t2
t
d(start)
t4
low frequency high frequency