Datasheet

TDA8025_1 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 01 — 6 April 2009 26 of 38
NXP Semiconductors
TDA8025
IC card interface
I
IH
HIGH-level input
current
pin I/O; V
IH
=V
CC
--10 µA
t
r(i)
input rise time V
IL
maximum to
V
IH
minimum
- - 1.2 µs
t
r(o)
output rise time C
L
≤ 80 pF; 10 % to 90 %;
0 V to V
CC
- - 0.1 µs
t
f(i)
input fall time V
IL
maximum to
V
IH
minimum
- - 1.2 µs
t
f(o)
output fall time C
L
≤ 80 pF; 10 % to 90 %;
0 V to V
CC
- - 0.1 µs
R
pu
pull-up
resistance
between I/O and V
CC
81113 kΩ
I
OH
HIGH-level
output current
pin I/O when active
pull-up; V
OH
= 0.9V
CC
;
C=80pF
−8 −6 −4mA
Data lines to the system: pins I/OUC, AUX1UC and AUX2UC
[5]
V
OL
LOW-level output
voltage
I
OL
= 1 mA 0 - 0.3 V
V
OH
HIGH-level
output voltage
no DC load 0.9V
DD(INTF)
-V
DD(INTF)
+ 0.1 V
I
OH
≤ 40 µA;
V
DD(INTF)
>2V
0.75V
DD(INTF)
-V
DD(INTF)
+ 0.1 V
I
OH
≤ 20 µA;
V
DD(INTF)
<2V
0.75V
DD(INTF)
-V
DD(INTF)
+ 0.1 V
V
IL
LOW-level input
voltage
−0.3 - +0.3V
DD(INTF)
V
V
IH
HIGH-level input
voltage
0.7V
DD(INTF)
-V
DD(INTF)
+ 0.3 V
V
hys
hysteresis
voltage
pin I/OUC - 0.19V
DD(INTF)
-V
I
IH
HIGH-level input
current
pin I/OUC; V
IH
=V
DD(INTF)
--10 µA
I
IL
LOW-level input
current
pin I/OUC; V
IL
= 0 V - - 600 µA
R
pu
pull-up
resistance
between I/OUC and
V
DD(INTF)
81113 kΩ
t
r(i)
input rise time V
IL
maximum to
V
IH
minimum
- - 1.2 µs
t
r(o)
output rise time C
L
≤ 80pF;10%to90%;
0 V to V
CC
- - 0.1 µs
t
f(i)
input fall time V
IL
maximum to
V
IH
minimum
- - 1.2 µs
t
f(o)
output fall time C
L
≤ 80 pF; 10 % to 90 %;
0 V to V
CC
- - 0.1 µs
Table 8. Characteristics of IC supply voltage
…continued
T
amb
=25 ° C; all parameters remain within limits but are only statistically tested for the temperature range; f
xtal
= 10 MHz; all
currents flowing into the IC are positive; unless otherwise specified. Parameters specified as a function of
V
DD(INTF)
,V
DDI(REG)
, V
DD(INTREGD)
or V
CC
refer to the actual value at the time of measurement.
Symbol Parameter Conditions Min Typ Max Unit