Datasheet

2004 July 12 21
Philips Semiconductors Product specification
IC card interface TDA8024
t
f
fall time C
L
= 30 pF; note 5 −−16 ns
δ duty factor (except for
f
XTAL
)
C
L
= 30 pF; note 5 45 − 55 %
SR slew rate slew up or down; C
L
= 30 pF 0.2 −− V/ns
Control inputs (pins CLKDIV1, CLKDIV2, CMDVCC, RSTIN and 5V/3V); note 6
V
IL
LOW-level input voltage −0.3 − +0.3V
DD
V
V
IH
HIGH-level input voltage 0.7V
DD
− V
DD
+ 0.3 V
I
LIL
 LOW-level input leakage
current
0<V
IL
<V
DD
−−1 µA
I
LIH
 HIGH-level input leakage
current
0<V
IH
<V
DD
−−1 µA
Card presence inputs (pins PRES and PRES); note 7
V
IL
LOW-level input voltage −0.3 − +0.3V
DD
V
V
IH
HIGH-level input voltage 0.7V
DD
− V
DD
+ 0.3 V
I
LIL
 LOW-level input leakage
current
0<V
IL
<V
DD
−−5 µA
I
LIH
 HIGH-level input leakage
current
0<V
IH
<V
DD
−−5 µA
Interrupt output (pin OFF; NMOS drain with integrated 20 kΩ pull-up resistor to V
DD
)
V
OL
LOW-level output voltage I
OL
= 2 mA 0 − 0.3 V
V
OH
HIGH-level output voltage I
OH
= −15 µA 0.75V
DD
−− V
R
pu
integrated pull-up resistor 20 kΩ pull-up resistor to V
DD
16 20 24 kΩ
Protection and limitation
I
CC(sd)
 shutdown and limitation
current pin V
CC
− 130 150 mA
I
I/O(lim)
limitation current pins I/O,
AUX1 and AUX2
−15 − +15 mA
I
CLK(lim)
limitation current pin CLK −70 − +70 mA
I
RST(lim)
limitation current pin RST −20 − +20 mA
T
sd
shut-down temperature − 150 −°C
Timing
t
act
activation time see Fig.7 50 − 220 µs
t
de
deactivation time see Fig.8 50 80 100 µs
t
3
start of the window for
sending CLK to the card
see Fig.7 50 − 130 µs
t
5
end of the window for
sending CLK to the card
see Fig.7 140 − 220 µs
t
debounce
debounce time pins PRES
and PRES
see Fig.10 5 8 11 ms
SYMBOL PARAMETER CONDITIONS MIN. TYP MAX. UNIT