Datasheet

TDA8023_1 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 01 — 16 July 2007 22 of 32
NXP Semiconductors
TDA8023
Low power IC card interface
[1] Pin I/OUC has an internal 11 kΩ pull-up resistor to V
DD(INTF)
.
[2] The hold time required (not greater than 300 ns) to bridge the undefined region of the falling edge of SCL must be internally provided by
a transmitter.
[1] Pin I/O has an internal 15 kΩ pull-up resistor to V
CC
.
I
2
C-bus timing; see Figure 7
f
SCL
SCL clock frequency 0 - 400 kHz
t
BUF
bus free time between a STOP
and START condition
1.3 - - µs
t
HD;STA
hold time (repeated) START
condition
hold time after which first
clock pulse is generated
0.6 - - µs
t
LOW
LOW period of the SCL clock 1.3 - - µs
t
HIGH
HIGH period of the SCL clock 0.6 - - µs
t
SU;STA
set-up time for a repeated
START condition
0.6 - - µs
t
HD;DAT
data hold time
[2]
0-- ns
t
SU;DAT
data set-up time 100 - - ns
t
r
rise time of both SDA and SCL
signals
- - 300 ns
t
f
fall time of both SDA and SCL
signals
- - 300 ns
t
SU;STO
set-up time for STOP condition 0.6 - - µs
Table 20. Interface signals to host controller …continued
V
DD
= 3.3 V; V
DD(INTF)
= 1.5 V; f
CLKIN
= 10 MHz; GND = 0 V; T
amb
= 25 ° C; unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
Table 21. Protection and limitations
V
DD
= 3.3 V; V
DD(INTF)
= 1.5 V; f
CLKIN
= 10 MHz; GND = 0 V; T
amb
= 25 ° C; unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
T
amb
ambient temperature −40 - +85 °C
T
sd
shutdown temperature at die - 150 - °C
I
Ilim
input current limit on pin I/O
[1]
−15 - +15 mA
I
Olim
output current limit on pin I/O
[1]
−15 - +15 mA
on pin CLK −70 - +70 mA
shutdown current; on pin RST −20 - +20 mA
shutdown current; on pin V
CC
- −90 - mA