Datasheet

PIMN31_1 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 01 — 19 June 2007 2 of 11
NXP Semiconductors
PIMN31
500 mA, 50 V NPN/NPN double RET; R1 = 1 kΩ, R2 = 10 kΩ
2. Pinning information
3. Ordering information
4. Marking
5. Limiting values
Table 2. Pinning
Pin Description Simplified outline Symbol
1 GND (emitter) TR1
2 input (base) TR1
3 output (collector) TR2
4 GND (emitter) TR2
5 input (base) TR2
6 output (collector) TR1
132
4
56
65 4
1
23
R2
TR1
TR2
R1
R2 R1
sym063
Table 3. Ordering information
Type number Package
Name Description Version
PIMN31 SC-74 plastic surface-mounted package (TSOP6); 6 leads SOT457
Table 4. Marking codes
Type number Marking code
PIMN31 4E
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
Per transistor
V
CBO
collector-base voltage open emitter - 50 V
V
CEO
collector-emitter voltage open base - 50 V
V
EBO
emitter-base voltage open collector - 5 V
V
I
input voltage
positive - +12 V
negative - −5V
I
O
output current - 500 mA
P
tot
total power dissipation T
amb
≤ 25 °C
[1]
- 290 mW