Datasheet

PCF8574_PCF8574A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 5 — 27 May 2013 10 of 33
NXP Semiconductors
PCF8574; PCF8574A
Remote 8-bit I/O expander for I
2
C-bus with interrupt
8.5 Interrupt output (INT)
The PCF8574/74A provides an open-drain output (INT) which can be fed to a
corresponding input of the microcontroller (see Figure 10
). As soon as a port input is
changed, the INT
will be active (LOW) and notify the microcontroller.
An interrupt is generated at any rising or falling edge of the port inputs. After time t
v(Q)
, the
signal INT
is valid.
The interrupt will reset to HIGH when data on the port is changed to the original setting or
data is read or written by the master.
In the Write mode, the interrupt may be reset (HIGH) on the rising edge of the
acknowledge bit of the address byte and also on the rising edge of the write to port pulse.
The interrupt will always be reset (HIGH) on the falling edge of the write to port pulse (see
Figure 8
).
The interrupt is reset (HIGH) in the Read mode on the rising edge of the read from port
pulse (see Figure 9
).
During the interrupt reset, any I/O change close to the read or write pulse may not
generate an interrupt, or the interrupt will have a very short pulse. After the interrupt is
reset, any change in I/Os will be detected and transmitted as an INT
.
At power-on reset all ports are in Input mode and the initial state of the ports is HIGH,
therefore, for any port pin that is pulled LOW or driven LOW by external source, the
interrupt output will be active (output LOW).
Fig 10. Application of multiple PCF8574/74As with interrupt
002aad634
V
DD
MICROCONTROLLER
INT
PCF8574
INT
PCF8574
INT
device 1 device 2
PCF8574A
INT
device 16