Datasheet
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PCAL9539A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 1 — 3 October 2012 16 of 48
NXP Semiconductors
PCAL9539A
16-bit I
2
C-bus and SMBus low power I/O port with interrupt and reset
Fig 7. Write to output port registers
1101A1A00AS1
START condition R/W acknowledge
from slave
002aad725
A
SCL
SDA A
write to port
data out
from port 0
P
t
v(Q)
987654321
command byte
data to port 0
DATA 0
slave address
00000100
STOP
condition
0.00.7
acknowledge
from slave
acknowledge
from slave
data to port 1
DATA 1 1.01.7
A
data out
from port 1
t
v(Q)
DATA VALID
Fig 8. Write to Control registers
0 AS
slave address
START condition R/W acknowledge
from slave
002aah063
0/1 0 0 0/1 0/1 0/1 0/10
command byte
A
acknowledge
from slave
12345678SCL 9
SDA
DATA 0 A
acknowledge
from slave
data to register
1101A1A01
P
STOP
condition
MSB LSB
A
acknowledge
from slave
DATA 1
data to register
MSB LSB
