Datasheet

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PCAL9535A All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved. Product data sheet Rev. 2 — 23 January 2015 15 of 46 NXP Semiconductors
PCAL9535A
Low-voltage 16-bit I
2
C-bus I/O port with interrupt and Agile I/O
Fig 7. Write to output port registers
1 0 0 A2 A1 A0 0 AS0
START condition R/W acknowledge
from slave
002aah372
A
SCL
SDA A
write to port
data out
from port 0
P
t
v(Q)
987654321
command byte
data to port 0
DATA 0
slave address
00000100
STOP
condition
0.00.7
acknowledge
from slave
acknowledge
from slave
data to port 1
DATA 1 1.01.7
A
data out
from port 1
t
v(Q)
DATA VALID
Fig 8. Write to Control registers
0 AS
slave address
START condition R/W acknowledge
from slave
002aah373
0/1 0 0 0/1 0/1 0/1 0/10
command byte
A
acknowledge
from slave
12345678SCL 9
SDA
DATA 0 A
acknowledge
from slave
data to register
1 0 0 A2 A1 A00
P
STOP
condition
MSB LSB
A
acknowledge
from slave
DATA 1
data to register
MSB LSB