Datasheet

PCAL6408A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 3 — 18 September 2013 5 of 49
NXP Semiconductors
PCAL6408A
Low-voltage translating, 8-bit I
2
C-bus/SMBus I/O expander
5. Pinning information
5.1 Pinning
The exposed center pad, if used, must be
connected only as a secondary V
SS
or
must be left electrically open.
Fig 2. Pin configuration for TSSOP16 Fig 3. Pin configuration for HVQFN16
Fig 4. Pin configuration for XQFN16
PCAL6408APW
V
DD(I2C-bus)
V
DD(P)
ADDR SDA
RESET SCL
P0 INT
P1 P7
P2 P6
P3 P5
V
SS
P4
002aah086
1
2
3
4
5
6
7
8
10
9
12
11
14
13
16
15
002aah087
Transparent top view
P6
P7
SCL
P3
V
SS
P4
P5
ADDR V
DD(I2C-bus)
V
DD(P)
SDA
4 9
3 10
2 11
1 12
5 6
7
8
16 15 14 13
terminal 1
index area
RESET
P0 INT
P1
P2
PCAL6408ABS
PCAL6408AHK
terminal 1
index area
002aah088
Transparent top view
8P5 7P4 6V
SS
5P3
SDA13 V
DD(P)
14
V
DD(I2C-bus)
15
ADDR16
SCL12
INT11
P710
P69
1RESET
2P0
3P1
4P2