Datasheet

PCAL6408A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 3 — 18 September 2013 12 of 49
NXP Semiconductors
PCAL6408A
Low-voltage translating, 8-bit I
2
C-bus/SMBus I/O expander
7.4.10 Interrupt status register (46h)
This read-only register is used to identify the source of an interrupt. When read, a logic 1
indicates that the corresponding input pin was the source of the interrupt. A logic 0
indicates that the input pin is not the source of an interrupt.
When a corresponding bit in the interrupt mask register is set to 1 (masked), the interrupt
status bit returns logic 0.
7.4.11 Output port configuration register (4Fh)
The output port configuration register selects port-wise push-pull or open-drain I/O stage.
A logic 0 configures the I/O as push-pull (Q1 and Q2 are active, see Figure 9
). A logic 1
configures the I/O as open-drain (Q1 is disabled, Q2 is active) and the recommended
command sequence is to program this register (4Fh) before the Configuration register
(03h) sets the port pins as outputs.
Table 17. Interrupt status register (address 46h)
Bit 7 6 5 4 3 2 1 0
Symbol S7 S6 S5 S4 S3 S2 S1 S0
Default 00000000
Table 18. Output port configuration register (address 4Fh)
Bit 7 6 5 4 3 2 1 0
Symbol reserved ODEN
Default 00000000