Datasheet

PCA9674_PCA9674A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 7 — 30 May 2013 12 of 40
NXP Semiconductors
PCA9674; PCA9674A
Remote 8-bit I/O expander for Fm+ I
2
C-bus with interrupt
The I
2
C-bus master must interpret a non-acknowledge from the PCA9674; PCA9674A (at
any time) as a ‘Software Reset Abort’. The PCA9674; PCA9674A does not initiate a reset
of its registers.
The unique sequence that initiates a Software Reset is described in Figure 9
.
Simple code for Software Reset:
<S> <00h> <ACK> <06h> <ACK> <P>
7.2.2 Device ID (PCA9674; PCA9674A ID field)
The Device ID field is a 3-byte read-only (24 bits) word giving the following information:
• 12 bits with the manufacturer name, unique per manufacturer (for example, NXP).
• 9 bits with the part identification, assigned by manufacturer.
• 3 bits with the die revision, assigned by manufacturer (for example, Rev X).
The Device ID is read-only, hardwired in the device and can be accessed as follows:
1. START command
2. The master sends the Reserved Device ID I
2
C-bus address ‘1111 100’ with the R/W
bit set to 0 (write).
3. The master sends the I
2
C-bus slave address of the slave device it needs to identify.
The LSB is a ‘Don’t care’ value. Only one device must acknowledge this byte (the one
that has the I
2
C-bus slave address).
4. The master sends a Re-START command.
Remark: A STOP command followed by a START command will reset the slave state
machine and the Device ID read cannot be performed.
Remark: A STOP command or a Re-START command followed by an access to
another slave device will reset the slave state machine and the Device ID read cannot
be performed.
5. The master sends the Reserved Device ID I
2
C-bus address ‘1111 100’ with the R/W
bit set to 1 (read).
6. The device ID read can be done, starting with the 12 manufacturer bits (first byte +
4 MSB of the second byte), followed by the 9 part identification bits and then the
3 die revision bits (3 LSB of the third byte).
7. The master ends the reading sequence by NACKing the last byte, thus resetting the
slave device state machine and allowing the master to send the STOP command.
Fig 9. Software Reset sequence
002aac262
0 0 0 0 0 0 0 AS 0
SWRST Call I
2
C-bus address
START condition R/W
acknowledge
from slave(s)
0 0 0 0 1 1 00
SWRST data = 06h
A
acknowledge
from slave(s)
P
PCA9674/74A is(are) reset.
Registers are set to default power-up values.