Datasheet

PCA9575 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 4 — 20 May 2014 4 of 42
NXP Semiconductors
PCA9575
16-bit I
2
C-bus and SMBus, level translating, low voltage GPIO
5. Block diagram
Remark: All I/Os are set to inputs at power-up and RESET.
(1) PCA9575PW2 only.
Fig 1. Block diagram of PCA9575
PCA9575
POWER-ON
RESET
002aad562
I
2
C-BUS/SMBus
CONTROL
INPUT
FILTER
SCL
SDA
V
DD
INPUT/
OUTPUT
PORTS
BANK 0
P0_0
V
SS
8-bit
write pulse
read pulse
P0_2
P0_4
P0_6
P0_1
P0_3
P0_5
P0_7
LP
FILTER
V
DD
INT
A1
RESET
V
DD(IO)0
INPUT/
OUTPUT
PORTS
BANK 1
P1_0
8-bit
write pulse
read pulse
P1_2
P1_4
P1_6
P1_1
P1_3
P1_5
P1_7
V
DD(IO)1
A0
A2
A3
(1)