Datasheet

PCA9575 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 4 — 20 May 2014 14 of 42
NXP Semiconductors
PCA9575
16-bit I
2
C-bus and SMBus, level translating, low voltage GPIO
7.6.7 Register 6 - Pull-up/pull-down select port 0 register
When bus-hold feature is not selected and bit 1 of Register 4 is set to logic 1, the I/O
port 0 can be configured to have pull-up or pull-down by programming the
pull-up/pull-down register. Setting a bit to logic 1 selects a 100 k pull-up resistor for that
I/O pin. Setting a bit to logic 0 selects a 100 k pull-down resistor for that I/O pin. If the
bus-hold feature is enabled, writing to this register has no effect on pull-up/pull-down
selection.
7.6.8 Register 7 - Pull-up/pull-down select port 1 register
When bus-hold feature is not selected and bit 1 of Register 5 is set to logic 1, the I/O
port 1 can be configured to have pull-up or pull-down by programming the
pull-up/pull-down register. Setting a bit to logic 1 selects a 100 k pull-up resistor for that
I/O pin. Setting a bit to logic 0 selects a 100 k pull-down resistor for that I/O pin. If the
bus-hold feature is enabled, writing to this register has no effect on pull-up/pull-down
selection.
Table 11. Register 6 - Pull-up/pull-down select port 0 register (address 06h) bit description
Legend: * default value.
Bit Symbol Access Value Description
7 P0.7 R/W 1* configures I/O port 0 pin to have pull-up or pull-down when
bus-hold feature not selected and bit 1 of Register 4 is logic 1
0 = selects a 100 k pull-down resistor for that I/O pin
1 = selects a 100 k pull-up resistor for that I/O pin (default
value)
6 P0.6 R/W 1*
5 P0.5 R/W 1*
4 P0.4 R/W 1*
3 P0.3 R/W 1*
2 P0.2 R/W 1*
1 P0.1 R/W 1*
0 P0.0 R/W 1*
Table 12. Register 7 - Pull-up/pull-down select port 1 register (address 07h) bit description
Legend: * default value.
Bit Symbol Access Value Description
7 P1.7 R/W 1* configures I/O port 1 pin to have pull-up or pull-down when
bus-hold feature not selected and bit 1 of Register 5 is logic 1
0 = selects a 100 k pull-down resistor for that I/O pin
1 = selects a 100 k pull-up resistor for that I/O pin (default
value)
6 P1.6 R/W 1*
5 P1.5 R/W 1*
4 P1.4 R/W 1*
3 P1.3 R/W 1*
2 P1.2 R/W 1*
1 P1.1 R/W 1*
0 P1.0 R/W 1*