Datasheet
PCA9575 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 4 — 20 May 2014 12 of 42
NXP Semiconductors
PCA9575
16-bit I
2
C-bus and SMBus, level translating, low voltage GPIO
7.6.4 Register 3 - Polarity inversion port 1 register
This register allows the user to invert the polarity of the Input port register data. If a bit in
this register is set (written with ‘1’), the corresponding Input port data is inverted. If a bit in
this register is cleared (written with a ‘0’), the Input port data polarity is retained.
7.6.5 Register 4 - Bus-hold/pull-up/pull-down enable 0 register
Bit 0 of this register allows the user to enable/disable the bus-hold feature for the I/O pins.
Setting the bit 0 to logic 1 enables bus-hold feature for the I/O bank 0. In this mode, the
pull-up/pull-downs are disabled for I/O bank 0. Setting the bit 0 to logic 0 disables
bus-hold feature.
Bit 1 of this register allows the user to enable/disable pull-up/pull-downs on the I/O pins.
Setting the bit 1 to logic 1 enables selection of pull-up/pull-down using Register 6. Setting
the bit 1 to logic 0 disables pull-up/pull-downs on the I/O bank 0 pins and contents of
Register 6 have no effect on the I/O.
Table 8. Register 3 - Polarity Inversion port 1 register (address 03h) bit description
Legend: * default value.
Bit Symbol Access Value Description
7 N1.7 R/W 0* inverts polarity of Input port 1 register data
0 = Input port 1 register data retained (default value)
1 = Input port 1 register data inverted
6N1.6 R/W 0*
5N1.5 R/W 0*
4N1.4 R/W 0*
3N1.3 R/W 0*
2N1.2 R/W 0*
1N1.1 R/W 0*
0N1.0 R/W 0*
Table 9. Register 4 - Bus-hold/pull-up/pull-down enable 0 register (address 04h)
bit description
Legend: * default value.
Bit Symbol Access Value Description
7 E0.7 R/W X not used
6E0.6 R/W X
5E0.5 R/W X
4E0.4 R/W X
3E0.3 R/W X
2E0.2 R/W X
1 E0.1 R/W 0* allows the user to enable/disable pull-up/pull-downs on the
I/O bank 0 pins
0 = disables pull-up/pull-downs on the I/O bank 0 pins and
contents of Register 6 have no effect on the I/O bank 0
(default value)
1 = enables selection of pull-up/pull-down using Register 6
0 E0.0 R/W 0* allows user to enable/disable the bus-hold feature for the
I/O bank 0 pins
0 = disables bus-hold feature (default value)
1 = enables bus-hold feature
