Datasheet
Table Of Contents
- 1. General description
- 2. Features and benefits
- 3. Applications
- 4. Ordering information
- 5. Block diagram
- 6. Pinning information
- 7. Functional description
- 7.1 Device address
- 7.2 Command register
- 7.3 Register definitions
- 7.4 Writing to port registers
- 7.5 Reading the port registers
- 7.5.1 Register 0 - Input port register
- 7.5.2 Register 1 - Polarity inversion register
- 7.5.3 Register 2 - Bus-hold/pull-up/pull-down enable register
- 7.5.4 Register 3 - Pull-up/pull-down selector register
- 7.5.5 Register 4 - Configuration register
- 7.5.6 Register 5 - Output port register
- 7.5.7 Register 6 - Interrupt mask register
- 7.5.8 Register 7 - Interrupt status register
- 7.6 Power-on reset
- 7.7 RESET input
- 7.8 Software reset
- 7.9 Interrupt output (INT)
- 7.10 Standby
- 8. Characteristics of the I2C-bus
- 9. Bus transactions
- 10. Application design-in information
- 11. Limiting values
- 12. Static characteristics
- 13. Dynamic characteristics
- 14. Test information
- 15. Package outline
- 16. Handling information
- 17. Soldering of SMD packages
- 18. Abbreviations
- 19. Revision history
- 20. Legal information
- 21. Contact information
- 22. Contents
PCA9574 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 5 — 25 September 2014 18 of 32
NXP Semiconductors
PCA9574
8-bit I
2
C-bus and SMBus, level translating, low voltage GPIO
10. Application design-in information
11. Limiting values
Device address configured as 0100 0000b for this example.
P0, P2, P3 configured as outputs.
P1, P4, P5 configured as inputs.
P6, P7 are not used and must be configured as outputs.
Fig 15. Typical application
PCA9574
P0
P1
SCL
SDA
V
DD
SCL
SDA
P2
P3
V
DD
V
SS
MASTER
CONTROLLER
V
SS
V
DD
= 1.1 V to 3.6 V
SUBSYSTEM 1
(e.g., temp. sensor)
INT
SUBSYSTEM 2
(e.g., counter)
RESET
controlled switch
(e.g., CBT device)
A
B
enable
INT
V
DD(IO)
INT
1.1 kΩ 2 kΩ
SUBSYSTEM 3
(e.g., alarm system)
ALARM
P4
P5
V
DD(IO)
A0
P6
P7
1.6 kΩ1.6 kΩ
RESETRESET
V
DD(IO)
= 3.6 V
002aad061
SUBSYSTEM 4
(e.g., RF module)
CTRL
Table 13. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
V
DD
supply voltage 0.5 +4.0 V
V
DD(IO)
input/output supply voltage V
SS
0.5 V
DD
+0.5 V
I
I/O
input/output current - 5mA
I
I
input current - 20 mA
I
DD
supply current - 90 mA
I
SS
ground supply current - 90 mA
P
tot
total power dissipation - 75 mW
T
stg
storage temperature 65 +150 C
T
amb
ambient temperature 40 +85 C
