Datasheet

PCA9574 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 5 — 25 September 2014 16 of 32
NXP Semiconductors
PCA9574
8-bit I
2
C-bus and SMBus, level translating, low voltage GPIO
9. Bus transactions
Data is transmitted to the PCA9574 registers using ‘Write Byte’ transfers (see Figure 11
and Figure 12
).
Data is read from the PCA9574 registers using ‘Read Byte’ transfers (see Figure 13
and
Figure 14
).
Fig 11. Write to Output port register
0 AS
slave address
START condition R/W acknowledge
from slave
002aad057
00001010
command byte
A
acknowledge
from slave
12345678SCL 9
SDA
DATA 1 A
write to port
data out from port
t
v(Q)
acknowledge
from slave
DATA 1 VALID
data to port
10000A00
P
STOP
condition
Fig 12. Write to Polarity inversion, Bus-hold enable, Pull-up/pull-down selector, Configuration, Interrupt mask
and Interrupt status registers
0 AS
slave address
START condition R/W acknowledge
from slave
002aad058
0000XXX0
command byte
A
acknowledge
from slave
12345678SCL 9
SDA
DATA A
data to register
acknowledge
from slave
data to register
10000A00
P
STOP
condition