Datasheet

PCA9557 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 7 — 10 December 2013 5 of 30
NXP Semiconductors
PCA9557
8-bit I
2
C-bus and SMBus I/O port with reset
5. Pinning information
5.1 Pinning
5.2 Pin description
Fig 4. Pin configuration for SO16 Fig 5. Pin configuration for TSSOP16
Fig 6. Pin configuration for HVQFN16
PCA9557D
SCL V
DD
SDA RESET
A0 IO7
A1 IO6
A2 IO5
IO0 IO4
IO1 IO3
V
SS
IO2
002aad272
1
2
3
4
5
6
7
8
10
9
12
11
14
13
16
15
IO7
IO6
IO5
IO4
IO3
IO2
SCL
SDA
A0
A1
A2
IO0
IO1
V
SS
PCA9557PW
002aad273
1
2
3
4
5
6
7
8
10
9
12
11
14
13
16
15
V
DD
RESET
002aad274
PCA9557BS
Transparent top view
IO0
IO4
A2 IO5
A1 IO6
A0 IO7
IO1
V
SS
IO2
IO3
SDA SCL V
DD
RESET
4 9
3 10
2 11
1 12
5 6
7
8
16 15 14 13
terminal 1
index area
Table 3. Pin description
Symbol Pin Description
SO16, TSSOP16 HVQFN16
SCL 1 15 serial clock line
SDA 2 16 serial data line
A0 3 1 address input 0
A1 4 2 address input 1
A2 5 3 address input 2
IO0 6 4 input/output 0 (open-drain)
IO1 7 5 input/output 1