Datasheet

PCA9555_8 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 08 — 22 October 2009 21 of 34
NXP Semiconductors
PCA9555
16-bit I
2
C-bus and SMBus I/O port with interrupt
12. Test information
Fig 23. Definition of timing on the I
2
C-bus
t
SP
t
BUF
t
HD;STA
PP S
t
LOW
t
r
t
HD;DAT
t
f
t
HIGH
t
SU;DAT
t
SU;STA
Sr
t
HD;STA
t
SU;STO
SDA
SCL
002aaa986
R
L
= load resistor.
C
L
= load capacitance includes jig and probe capacitance.
R
T
= termination resistance should be equal to the output impedance of Z
o
of the pulse generators.
Fig 24. Test circuitry for switching times
Fig 25. Load circuit
PULSE
GENERATOR
V
O
C
L
50 pF
R
L
500 Ω
002aab284
R
T
V
I
V
DD
DUT
V
DD
open
GND
C
L
50 pF
002aac226
R
L
500 Ω
from output under test
2V
DD
open
GND
S1
R
L
500 Ω