Datasheet

PCA9547 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 4 — 1 April 2014 17 of 30
NXP Semiconductors
PCA9547
8-channel I
2
C-bus multiplexer with reset
Fig 15. Definition of timing on the I
2
C-bus
t
SP
t
BUF
t
HD;STA
PP S
t
LOW
t
r
t
HD;DAT
t
f
t
HIGH
t
SU;DAT
t
SU;STA
Sr
t
HD;STA
t
SU;STO
SDA
SCL
002aaa986
0.7 × V
DD
0.3 × V
DD
0.7 × V
DD
0.3 × V
DD
Fig 16. Definition of RESET timing
SDA
SCL
002aac314
50 %
70 %
50 % 50 %
t
rec(rst)
t
w(rst)L
RESET
START
t
rst
ACK or read cycle