Datasheet

PCA9546A All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 6 — 30 April 2014 5 of 30
NXP Semiconductors
PCA9546A
4-channel I
2
C-bus switch with reset
5.2 Pin description
[1] HVQFN16 package die supply ground is connected to both the V
SS
pin and the exposed center pad. The
V
SS
pin must be connected to supply ground for proper device operation. For enhanced thermal, electrical,
and board-level performance, the exposed pad must be soldered to the board using a corresponding
thermal pad on the board, and for proper heat conduction through the board thermal vias must be
incorporated in the PCB in the thermal pad region.
6. Functional description
Refer to Figure 1 “Block diagram of PCA9546A”.
6.1 Device address
Following a START condition, the bus master must output the address of the slave it is
accessing. The address of the PCA9546A is shown in Figure 5
. To conserve power, no
internal pull-up resistors are incorporated on the hardware selectable address pins and
they must be pulled HIGH or LOW.
The last bit of the slave address defines the operation to be performed. When set to
logic 1 a read is selected, while a logic 0 selects a write operation.
Table 3. Pin description
Symbol Pin Description
SO16, TSSOP16 HVQFN16
A0 1 15 address input 0
A1 2 16 address input 1
RESET
3 1 active LOW reset input
SD0 4 2 serial data 0
SC0 5 3 serial clock 0
SD1 6 4 serial data 1
SC1 7 5 serial clock 1
V
SS
86
[1]
supply ground
SD2 9 7 serial data 2
SC2 10 8 serial clock 2
SD3 11 9 serial data 3
SC3 12 10 serial clock 3
A2 13 11 address input 2
SCL 14 12 serial clock line
SDA 15 13 serial data line
V
DD
16 14 supply voltage
Fig 5. Slave address
002aab189
1 1 1 0 A2 A1 A0 R/W
fixed hardware
selectable