Datasheet

PCA9545A_45B_45C All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 9 — 5 May 2014 18 of 32
NXP Semiconductors
PCA9545A/45B/45C
4-channel I
2
C-bus switch with interrupt logic and reset
Fig 17. Definition of timing on the I
2
C-bus
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Fig 18. Definition of RESET timing
SDA
SCL
002aac549
50 %
30 %
50 % 50 %
t
REC;STA
t
w(rst)L
RESET
START
t
rst
ACK or read cycle
Rise and fall times refer to V
IL
and V
IH
.
Fig 19. I
2
C-bus timing diagram
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