Datasheet

PCA9541A All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 5 — 24 April 2014 27 of 45
NXP Semiconductors
PCA9541A
2-to-1 I
2
C-bus master selector with interrupt logic and reset
9.5 Bus initialization/recovery to initialize slaves without hardware reset
If the I
2
C-bus is hung, I
2
C-bus devices without a hardware reset pin (for example, Slave 1
and Slave 2 in Figure 22
) can be isolated from the master by the PCA9541A/03. The
PCA9541A/03 disconnects the bus when it is reset via the hardware reset line, restoring
the master's control of the rest of the bus (for example, Slave 0). The bus master can then
command the PCA9541A/03 to send 9 clock pulses/STOP condition to reset the
downstream I
2
C-bus devices before they are reconnected to the master or leave the
downstream devices isolated.
Fig 21. Gatekeeper multiplexer application
002aae665
MASTER 0
PCA9541A
PCA9548
EEPROM
Z
A
PCA9541A
EEPROM
Z
B
PCA9541A
EEPROM
Z
C
PCA9541A
EEPROM
Z
D
PCA9541A
EEPROM
Z
E
PCA9541A
EEPROM
Z
F
PCA9541A
EEPROM
Z
G
PCA9541A
EEPROM
Z
H
Fig 22. Bus initialization/recovery application
002aae666
PCA9541A/03
SLAVE 1
SDA
SCL
SLAVE 2
slave I
2
C-bus
MASTER
SLAVE 0
RESET
SDA/SCL