Datasheet
PCA9538A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 1 — 28 September 2012 13 of 37
NXP Semiconductors
PCA9538A
Low-voltage 8-bit I
2
C-bus I/O port with interrupt and reset
8.3 Power-on reset requirements
In the event of a glitch or data corruption, PCA9538A can be reset to its default conditions
by using the power-on reset feature. Power-on reset requires that the device go through a
power cycle to be completely reset. This reset also happens when the device is
powered on for the first time in an application.
The two types of power-on reset are shown in Figure 15
and Figure 16.
Table 10 specifies the performance of the power-on reset feature for PCA9538A for both
types of power-on reset.
[1] Level that V
DD
can glitch down to, but not cause a functional disruption when t
w(gl)VDD
<1s.
[2] Glitch width that will not cause a functional disruption when V
DD(gl)
=0.5 V
DD
.
Fig 15. V
DD
is lowered below 0.2 V or 0 V and then ramped up to V
DD
Fig 16. V
DD
is lowered below the POR threshold, then ramped back up to V
DD
002aah329
V
DD
time
ramp-up ramp-down
(dV/dt)
r
(dV/dt)
f
re-ramp-up
(dV/dt)
r
time to re-ramp
when V
DD
drops
below 0.2 V or to V
SS
t
d(rst)
002aah330
V
DD
time
ramp-down
(dV/dt)
f
ramp-up
(dV/dt)
r
time to re-ramp
when V
DD
drops
to V
POR(min)
− 50 mV
t
d(rst)
V
I
drops below POR levels
Table 10. Recommended supply sequencing and ramp rates
T
amb
=25
C (unless otherwise noted). Not tested; specified by design.
Symbol Parameter Condition Min Typ Max Unit
(dV/dt)
f
fall rate of change of voltage Figure 15 0.1 - 2000 ms
(dV/dt)
r
rise rate of change of voltage Figure 15 0.1 - 2000 ms
t
d(rst)
reset delay time Figure 15; re-ramp time when
V
DD
drops to V
SS
1- - s
Figure 16
; re-ramp time when
V
DD
drops to V
POR(min)
50 mV
1- - s
V
DD(gl)
glitch supply voltage difference Figure 17
[1]
--1.0V
t
w(gl)VDD
supply voltage glitch pulse width Figure 17
[2]
--10s
V
POR(trip)
power-on reset trip voltage falling V
DD
0.7 - - V
rising V
DD
--1.4V