Datasheet

PCA9537_5 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 05 — 7 May 2009 2 of 24
NXP Semiconductors
PCA9537
4-bit I
2
C-bus and SMBus low power I/O port with interrupt and reset
n Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
n Offered in TSSOP10 package
3. Ordering information
4. Block diagram
Table 1. Ordering information
T
amb
= − 40 ° C to +85 ° C
Type number Topside
mark
Package
Name Description Version
PCA9537DP 9537 TSSOP10 plastic thin shrink small outline package;
10 leads; body width 3 mm
SOT552-1
Remark: All I/Os are set to inputs at reset.
Fig 1. Block diagram of PCA9537
PCA9537
POWER-ON
RESET
002aae634
I
2
C-BUS/SMBus
CONTROL
INPUT
FILTER
SCL
SDA
V
DD
INPUT/
OUTPUT
PORTS
IO0
V
SS
4-bit
write pulse
read pulse
IO2
IO1
IO3
LP
FILTER
V
DD
INT
RESET