Datasheet

PCA9536_5 © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 05 — 25 January 2010 9 of 22
NXP Semiconductors
PCA9536
4-bit I
2
C-bus and SMBus I/O port
7. Application design-in information
This figure assumes the command byte has previously been programmed with 00h.
Transfer of data can be stopped at any moment by a STOP condition.
Fig 10. Read Input Port register
0000011AS1
START condition R/W
acknowledge
from slave
002aab857
A
acknowledge
from master
SCL
SDA
NA
read from
port
data into
port
P
t
h(D)
987654321
data from port
no acknowledge
from master
data from port
DATA 4
slave address
DATA 1
STOP
condition
DATA 2 DATA 3 DATA 4
t
su(D)
Device address is 1000 001X; IO0, IO2, IO3 configured as outputs; IO1 configured as input.
Fig 11. Typical application
PCA9536
IO0
IO1
SDA
SCL
V
DD
002aab858
SDA
SCL
10 kΩ 10 kΩ
IO2
IO3
V
DD
V
SS
MASTER
CONTROLLER
V
SS
V
DD
2 kΩ
SUBSYSTEM 1
(e.g. temp. sensor)
INT
SUBSYSTEM 2
(e.g. counter)
RESET
controlled switch
(e.g. CBT device)
A
B
enable