Datasheet

PCA9534_3 © NXP B.V. 2006. All rights reserved.
Product data sheet Rev. 03 — 6 November 2006 9 of 25
NXP Semiconductors
PCA9534
8-bit I
2
C-bus and SMBus low power I/O port with interrupt
This figure assumes the command byte has previously been programmed with 00h.
Transfer of data can be stopped at any moment by a STOP condition.
Fig 11. Read Input Port register
1 0 0 A2 A1 A0 1 AS0
START condition R/W
acknowledge
from slave
002aac475
A
acknowledge
from master
SCL
SDA NA
read from
port
data into
port
P
t
h(D)
987654321
data from port
no acknowledge
from master
data from port
DATA 4
slave address
DATA 1
STOP
condition
DATA 2 DATA 3 DATA 4
t
su(D)
INT
t
v(INT_N)
t
rst(INT_N)