Datasheet

PCA9534_3 © NXP B.V. 2006. All rights reserved.
Product data sheet Rev. 03 — 6 November 2006 2 of 25
NXP Semiconductors
PCA9534
8-bit I
2
C-bus and SMBus low power I/O port with interrupt
n 8 I/O pins which default to 8 inputs
n 0 Hz to 400 kHz clock frequency
n ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per
JESD22-A115 and 1000 V CDM per JESD22-C101
n Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
n Offered in four different packages: SO16, TSSOP16, and HVQFN16 (4 × 4 × 0.85 mm
and 3 × 3 × 0.85 mm versions)
3. Ordering information
4. Block diagram
Table 1. Ordering information
T
amb
= − 40 ° C to +85 ° C.
Type number Topside
mark
Package
Name Description Version
PCA9534D PCA9534D SO16 plastic small outline package; 16 leads; body width 7.5 mm SOT162-1
PCA9534PW PCA9534 TSSOP16 plastic thin shrink small outline package; 16 leads;
body width 4.4 mm
SOT403-1
PCA9534BS 9534 HVQFN16 plastic thermal enhanced very thin quad flat package;
no leads; 16 terminals; body 4 × 4 × 0.85 mm
SOT629-1
PCA9534BS3 P34 HVQFN16 plastic thermal enhanced very thin quad flat package;
no leads; 16 terminals; body 3 × 3 × 0.85 mm
SOT758-1
All I/Os are set to inputs at reset.
Fig 1. Block diagram of PCA9534
PCA9534
POWER-ON
RESET
002aac469
I
2
C-BUS/SMBus
CONTROL
INPUT
FILTER
SCL
SDA
V
DD
INPUT/
OUTPUT
PORTS
IO0
V
SS
8-bit
write pulse
read pulse
IO2
IO4
IO6
IO1
IO3
IO5
IO7
LP
FILTER
V
DD
INT
A0
A1
A2