Datasheet

PCA9510A_4 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 04 — 18 August 2009 4 of 24
NXP Semiconductors
PCA9510A
Hot swappable I
2
C-bus and SMBus bus buffer
7. Pinning information
7.1 Pinning
7.2 Pin description
Fig 2. Pin configuration for SO8 Fig 3. Pin configuration for TSSOP8
ENABLE V
CC
SCLOUT SDAOUT
SCLIN SDAIN
GND READY
002aab782
1
2
3
4
6
5
8
7
PCA9510AD
PCA9510ADP
ENABLE V
CC
SCLOUT SDAOUT
SCLIN SDAIN
GND READY
002aab783
1
2
3
4
6
5
8
7
Table 3. Pin description
Symbol Pin Description
ENABLE 1 Chip enable. Grounding this input puts the part in a Low current (< 1 µA)
mode. It also disables the rise time accelerators, isolates SDAIN from
SDAOUT and isolates SCLIN from SCLOUT.
SCLOUT 2 serial clock output to and from the SCL bus on the card
SCLIN 3 serial clock input to and from the SCL bus on the backplane
GND 4 ground supply; connect this pin to a ground plane for best results
READY 5 open-drain output which pulls LOW when SDAIN and SCLIN are
disconnected from SDAOUT and SCLOUT, and goes HIGH when the two
sides are connected
SDAIN 6 serial data input to and from the SDA bus on the backplane
SDAOUT 7 serial data output to and from the SDA bus on the card
V
CC
8 power supply