Datasheet
PCA9509P All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 3 — 19 July 2013 22 of 25
NXP Semiconductors
PCA9509P
Low power level translating I
2
C-bus/SMBus repeater
15. Abbreviations
16. Revision history
Table 10. Abbreviations
Acronym Description
CDM Charged-Device Model
CMOS Complementary Metal-Oxide Semiconductor
CPU Central Processing Unit
ESD ElectroStatic Discharge
HBM Human Body Model
I/O Input/Output
I
2
C-bus Inter-Integrated Circuit bus
NMOS Negative-channel Metal-Oxide Semiconductor
RC Resistor-Capacitor network
SMBus System Management Bus
Table 11. Revision history
Document ID Release date Data sheet status Change notice Supersedes
PCA9509P v.3 20130719 Product data sheet - PCA9509P v.2
Modifications:
• Section 7 “Application design-in information”:
– Third paragraph rewritten to describe timing events better
– Figure 5 “
Bus B SMBus/I
2
C-bus waveform” modified: added phrase “from slave on B side”
– Figure 6 “
Bus A lower voltage waveform” modified: added phrase “from slave on B side” and
adjusted SDA waveform
PCA9509P v.2 20130515 Product data sheet - PCA9509P v.1
PCA9509P v.1 20120814 Product data sheet - -
