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1. General description

The PCA9509A is a level translating I

C-bus/SMBus repeater with two voltage supplies

that enables processor low voltage 2-wire serial bus to interface with standard I

C-bus or

SMBus I/O. While retaining all the operating modes and features of the I

C-bus system

during the level shifts, it also permits extension of the I

C-bus by providing bidirectional

buffering for both the data (SDA) and the clock (SCL) lines, thus enabling the I

C-bus or

SMBus maximum capacitance of 400 pF on the higher voltage side. Port A allows a

voltage range from 0.8 V to 1.5 V and requires no external pull-up resistors due to the

internal current source. Port B allows a voltage range from 2.3 V to 5.5 V and is

overvoltage tolerant. Both port A and port B SDA and SCL pins are high-impedance when

the PCA9509A is unpowered.

The bus port B drivers are compliant with SMBus I/O levels, while port A uses an offset

LOW which prevents bus lock-up and allows the bidirectional nature of the device. Port A

uses a current source for pull-up and an offset pull-down driver. This results in a LOW on

the port A accommodating smaller voltage swings. The output pull-down on the port A

internal buffer LOW is set for approximately 0.2V

CC(A)

, while the input threshold of the

internal buffer is set about 50 mV lower than that of the output voltage LOW. When the

port A I/O is driven LOW internally, the LOW is not recognized as a LOW by the input.

This prevents a lock-up condition from occurring. The output pull-down on the port B

drives a hard LOW and the input level is set at 30 % of SMBus or I

C-bus voltage level

which enables port B to connect to any other I

C-bus devices or buffer.

The PCA9509A drivers are not enabled unless V

CC(A)

is above 0.7 V and V

CC(B)

is above

1.7 V. The enable (EN) pin can also be used to turn on and turn off the drivers under

system control. Caution should be observed to change only the state of the EN pin when

the bus is idle.

The PCA9509A is similar to the PCA9509 but offers lower A port voltage range to 0.8 V to

accommodate lower voltage processors and disables the current mirrors when disabled to

reduce standby power.

PCA9509A

Low power level translating I

C-bus/SMBus repeater

Rev. 2 — 17 July 2013 Product data sheet

Summary of content (25 pages)

PAGE 1
PCA9509A Low power level translating I2C-bus/SMBus repeater Rev. 2 — 17 July 2013 Product data sheet 1. General description The PCA9509A is a level translating I2C-bus/SMBus repeater with two voltage supplies that enables processor low voltage 2-wire serial bus to interface with standard I2C-bus or SMBus I/O.
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PCA9509A NXP Semiconductors Low power level translating I2C-bus/SMBus repeater 1.1 Selection recommendations The PCA9509A is recommended for all applications except in the following cases: • PCA9509P should be used if an external A-port pull-up resistor is required to adjust current for noise margin considerations or to reduce operating current consumption even more. • The PCA9509 should be used if instant on from disable is required with A Port voltage greater than 1.
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PCA9509A NXP Semiconductors Low power level translating I2C-bus/SMBus repeater 3. Ordering information Table 2. Ordering information Type number Topside mark Package Name Description Version PCA9509ADP 9509A TSSOP8 plastic thin shrink small outline package; 8 leads; body width 3 mm SOT505-1 PCA9509AGM 9AX[1] XQFN8 plastic, extremely thin quad flat package; no leads; 8 terminals; body 1.6  1.6  0.5 mm SOT902-2 [1] ‘X’ will change based on date code. 3.1 Ordering options Table 3.
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PCA9509A NXP Semiconductors Low power level translating I2C-bus/SMBus repeater 5. Pinning information 5.1 Pinning PCA9509AGM 8 VCC(B) 2 7 B1 A2 3 6 B2 GND 4 5 EN PCA9509ADP A1 A2 Pin configuration for TSSOP8 7 B1 2 6 B2 3 5 EN 002aaf972 Transparent top view 002aaf970 Fig 2. 8 1 4 1 A1 VCC(A) GND VCC(A) VCC(B) terminal 1 index area Fig 3. Pin configuration for XQFN8 5.2 Pin description Table 4.
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PCA9509A NXP Semiconductors Low power level translating I2C-bus/SMBus repeater 6. Functional description Refer to Figure 1 “Functional diagram of PCA9509A”. The PCA9509A enables I2C-bus or SMBus translation down to VCC(A) as low as 0.8 V without degradation of system performance. The PCA9509A contains 2 bidirectional open-drain buffers specifically designed to support up-translation/down-translation between the low voltage and 3.3 V SMBus or 5 V I2C-bus.
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PCA9509A NXP Semiconductors Low power level translating I2C-bus/SMBus repeater The enable pin should only change state when the bus and the repeater port are in an idle state to prevent system failures.
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PCA9509A NXP Semiconductors Low power level translating I2C-bus/SMBus repeater When the bus capacitance is high, the current should be set near the maximum current drive for the weakest part. However, if the bus capacitance is low a lower current/higher resistor value should be used to keep the rise time from getting so fast that it causes problems. The A side does not need a pull-up resistor. If one is added, care must be taken to keep the LOW-level voltage at the A side input below 0.1VCC(A). 7.
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PCA9509A NXP Semiconductors Low power level translating I2C-bus/SMBus repeater WK FORFN SXOVH DFNQRZOHGJH IURP VODYH RQ % VLGH 6&/ 6'$ DDD Fig 5. Bus B SMBus/I2C-bus waveform WK FORFN SXOVH DFNQRZOHGJH IURP VODYH RQ % VLGH 6&/ 6'$ 92/ RI 3&$ $ 92/ RI PDVWHU Fig 6. DDD Bus A lower voltage waveform 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134).
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PCA9509A NXP Semiconductors Low power level translating I2C-bus/SMBus repeater 9. Static characteristics Table 6. Static characteristics GND = 0 V; Tamb = 40 C to +85 C; unless otherwise specified. Parameter Conditions Min Typ[1] Max Unit VCC(B) supply voltage port B see Table note [2] 2.3[2] - 5.5 V VCC(A) supply voltage port A see Table note [2] 0.8[3] - 1.
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PCA9509A NXP Semiconductors Low power level translating I2C-bus/SMBus repeater [2] VCC(A) must be  VCC(B)  1 V, that is, VCC(A) = 1.5 V and VCC(B) = 2.3 V is not a valid combination. [3] Care must be taken to minimize the resistance in series with the ground pin of the PCA9509A to the ground reference point of the VCC(A) supply because there is only 80 mV margin between the power good threshold and the 0.8 V minimum supply voltage at cold temperature (40 C).
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PCA9509A NXP Semiconductors Low power level translating I2C-bus/SMBus repeater 10.1 AC waveforms VCC(B) input 0.5VCC(B) tPHL output 70 % VCC(A) 0.5VCC(B) input 0.1 V tPLH 0.5VCC(A) 0.5VCC(A) 30 % 30 % SRf tPHL VCC(A) 70 % 0.5VCC(A) output 70 % VOL SRr tPLH VCC(B) 0.5VCC(B) 30 % 0.5VCC(B) SRf 002aag139 Fig 7. 0.5VCC(A) 002aag140 Propagation delay times and slew rate; port B to port A Fig 8. Propagation delay times and slew rate; port A to port B tPLH 0.5VCC(A) input port A 0.
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PCA9509A NXP Semiconductors Low power level translating I2C-bus/SMBus repeater 10.2 Performance curves 002aag143 180 time (ns) 170 002aag144 160 time (ns) 140 tPLH2 tPHL 160 120 150 100 tPLH 140 −50 −25 0 25 50 75 100 125 Tamb (°C) tPHL 80 −50 VCC(A) = 1.1 V; VCC(B) = 3.3 V −25 0 25 50 75 100 125 Tamb (°C) VCC(A) = 1.1 V; VCC(B) = 3.3 V Fig 10. Typical port B to port A propagation delay versus ambient temperature 002aag145 −130 Fig 11.
PAGE 13
PCA9509A NXP Semiconductors Low power level translating I2C-bus/SMBus repeater 002aag147 180 002aag148 150 time (ns) time (ns) tPLH2 tPHL 160 130 tPLH 140 110 tPHL 120 0.8 0.9 1.0 1.1 1.2 1.3 90 0.8 1.4 1.5 VCC(A) (V) Tamb = 27 C; VCC(B) = 3.3 V 0.9 1.0 1.1 1.2 1.3 1.4 1.5 VCC(A) (V) Tamb = 27 C; VCC(B) = 3.3 V Fig 14. Typical port B to port A propagation delay versus port A supply voltage 002aag149 −120 Fig 15.
PAGE 14
PCA9509A NXP Semiconductors Low power level translating I2C-bus/SMBus repeater 002aag151 180 002aag152 150 time (ns) tPLH2 time (ns) tPHL 160 130 tPLH 140 110 120 1.7 2.3 3.3 4.5 5.5 VCC(B) (V) 90 1.7 Tamb = 27 C; VCC(A) = 1.1 V tPHL 2.3 3.3 4.5 5.5 VCC(B) (V) Tamb = 27 C; VCC(A) = 1.1 V Fig 18. Typical port B to port A propagation delay versus port B supply voltage 002aag153 −120 Fig 19. Typical port A to port B propagation delay versus port B supply voltage 002aag154 0.
PAGE 15
PCA9509A NXP Semiconductors Low power level translating I2C-bus/SMBus repeater 11. Test information VCC(B) VCC(A) VCC(B) RL OPEN-DRAIN BUFFER PULSE GENERATOR VI VO A DUT B CL RT 002aag141 RL = load resistor; 1.35 k on port B CL = load capacitance includes jig and probe capacitance; 50 pF RT = termination resistance should be equal to Zo of pulse generators Fig 22.
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PCA9509A NXP Semiconductors Low power level translating I2C-bus/SMBus repeater 12.
PAGE 17
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PAGE 18
PCA9509A NXP Semiconductors Low power level translating I2C-bus/SMBus repeater 13. Soldering of SMD packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “Surface mount reflow soldering description”. 13.1 Introduction to soldering Soldering is one of the most common methods through which packages are attached to Printed Circuit Boards (PCBs), to form electrical circuits.
PAGE 19
PCA9509A NXP Semiconductors Low power level translating I2C-bus/SMBus repeater 13.
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PCA9509A NXP Semiconductors Low power level translating I2C-bus/SMBus repeater maximum peak temperature = MSL limit, damage level temperature minimum peak temperature = minimum soldering temperature peak temperature time 001aac844 MSL: Moisture Sensitivity Level Fig 26. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description”. 14.
PAGE 21
PCA9509A NXP Semiconductors Low power level translating I2C-bus/SMBus repeater )RRWSULQW LQIRUPDWLRQ IRU UHIORZ VROGHULQJ RI ;4)1 SDFNDJH 627 +[ ' î & î +\ $\ 6/\ 6/[ VROGHU ODQG VROGHU SDVWH GHSRVLW VROGHU ODQG SOXV VROGHU SDVWH RFFXSLHG DUHD ',0(16,216 LQ PP $\ & ,VVXH GDWH ' 6/[ 6/\ +[ +\ VRW BIU Fig 28.
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PCA9509A NXP Semiconductors Low power level translating I2C-bus/SMBus repeater 15. Abbreviations Table 10. Abbreviations Acronym Description ATE Automated Test Equipment CDM Charged-Device Model CMOS Complementary Metal-Oxide Semiconductor CPU Central Processing Unit ESD ElectroStatic Discharge HBM Human Body Model I/O Input/Output I2C-bus Inter-Integrated Circuit bus NMOS Negative-channel Metal-Oxide Semiconductor RC Resistor-Capacitor network SMBus System Management Bus 16.
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PCA9509A NXP Semiconductors Low power level translating I2C-bus/SMBus repeater 17. Legal information 17.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification.
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PCA9509A NXP Semiconductors Low power level translating I2C-bus/SMBus repeater Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use.
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PCA9509A NXP Semiconductors Low power level translating I2C-bus/SMBus repeater 19. Contents 1 1.1 2 3 3.1 4 5 5.1 5.2 6 6.1 6.2 6.3 6.4 7 8 9 10 10.1 10.2 11 12 13 13.1 13.2 13.3 13.4 14 15 16 17 17.1 17.2 17.3 17.4 18 19 General description . . . . . . . . . . . . . . . . . . . . . . 1 Selection recommendations . . . . . . . . . . . . . . . 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 3 Ordering options . . . . . . . .