Datasheet

PCA9508_1 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 01 — 28 April 2008 7 of 21
NXP Semiconductors
PCA9508
Hot swappable level translating I
2
C-bus repeater
On the B bus side of the PCA9508, the clock and data lines would have a positive offset
from ground equal to the V
OL
of the PCA9508. After the 8
th
clock pulse, the data line will
be pulled to the V
OL
of the slave device, which is very close to ground in this example. At
the end of the acknowledge, the level rises only to the LOW level set by the driver in the
PCA9508 for a short delay while the A bus side rises above 0.5V
CC(A)
then it continues
HIGH. It is important to note that any arbitration or clock stretching events require that the
LOW level on the B bus side at the input of the PCA9508 (V
IL
) be at or below 0.4 V to be
recognized by the PCA9508 and then transmitted to the A bus side.
Multiple PCA9508 A sides can be connected in a star configuration (Figure 5), allowing all
nodes to communicate with each other.
Multiple PCA9508s can be connected in series (Figure 6) as long as the A side is
connected to the B side. I
2
C-bus slave devices can be connected to any of the bus
segments. The number of devices that can be connected in series is limited by repeater
delay/time-of-flight considerations on the maximum bus speed requirements.
Fig 5. Typical star application
V
CC(B)
V
CC(A)
PCA9508
SDAA SDAB
SCLA SCLB
EN
10 kΩ 10 kΩ
SDA
SCL
BUS
MASTER
SLAVE
400 kHz
SDA
SCL
V
CC(B)
V
CC(A)
10 kΩ 10 kΩ
V
CC(B)
V
CC(A)
PCA9508
SDAA SDAB
SCLA SCLB
EN
10 kΩ
10 kΩ
SLAVE
400 kHz
SDA
SCL
002aac655
V
CC(B)
V
CC(A)
PCA9508
SDAA SDAB
SCLA SCLB
EN
10 kΩ
10 kΩ
SLAVE
400 kHz
SDA
SCL