Datasheet

PCA8565 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 4 — 5 December 2014 9 of 48
NXP Semiconductors
PCA8565
Real time clock/calendar
8.4 Time and date registers
The majority of the registers are coded in the BCD format to simplify application use.
8.4.1 Register Seconds
[1] Start-up value.
8.4.1.1 Voltage-low detector
The PCA8565 has an on-chip voltage-low detector. When V
DD
drops below V
low
, bit VL in
the Seconds register is set to indicate that the integrity of the clock information is no
longer guaranteed. The VL flag is cleared by command.
Bit VL is intended to detect the situation when V
DD
is decreasing slowly, for example
under battery operation. Should V
DD
reach V
low
before power is re-asserted then bit VL is
set. This indicates that the time may be corrupt (see Figure 4
).
Fig 3. POR override sequence
PJP
6&/
QV QV
6'$
PV
RYHUULGHDFWLYH
SRZHURQ
Table 9. Register Seconds (address 02h) bits description
Bit Symbol Value Place value Description
7 VL 0 - clock integrity is guaranteed
1
[1]
- integrity of the clock information is not guaranteed
6 to 4 SECONDS 0 to 5 ten’s place actual seconds coded in BCD format
3 to 0 0 to 9 unit place
Table 10. Seconds coded in BCD format
Seconds value in
decimal
Upper-digit (ten’s place) Digit (unit place)
Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
00 0000000
01 0000001
02 0000010
:
09 0001001
10 0010000
:
58 1011000
59 1011001